SJ 20750-1999 Specification for radiation-hardened silicon single crystal wafers for military CMOS circuits

This specification specifies the requirements, quality assurance regulations and delivery preparation for radiation-resistant silicon single crystal wafers for military CMOS circuits. This specification applies to polished radiation-resistant silicon single crystal wafers (hereinafter referred to as silicon wafers) with diameters of 50.8mm, 76.2mm and 100mm for military CMOS circuits. SJ 20750-1999 Specification for radiation-resistant silicon single crystal wafers for military CMOS circuits SJ20750-1999 Standard download decompression password: www.bzxz.net

Military Standard of the Electronic Industry of the People's Republic of China FL5971
SJ 20750—1999
Specification for radiation hardened monocrystal silicon wafers for millitary CMOS integrated circuitsPublished on November 10, 1999
Implementation on December 1, 1999
Approved by the Ministry of Information Industry of the People's Republic of China Military Standard of the Electronic Industry of the People's Republic of China Specification for radiation hardened monocrystal silicon wafers for millitary CMOS integrated circuit1 Scope
1.1 Subject Content
SJ20750—1999
This specification specifies the requirements, quality assurance provisions and delivery preparation for radiation hardened monocrystal polished silicon wafers for military CMOS circuits.
1.2 Applicable scope
This specification applies to radiation-resistant silicon single crystal polished wafers (hereinafter referred to as silicon wafers) with diameters of 50.8 mm, 76.2 mm and 100 mm for military CMOS circuits.
1.3 Brand
The single crystal used for silicon wafers is phosphorus-doped N-type silicon single crystal pulled by the Czochralski method. The silicon wafer brand is expressed as: CMOS/RH--CZ--Si--PW--n(P)-<100). In the brand, CMOS represents CMOS circuit, RH-CZ represents radiation-resistant Czochralski silicon single crystal, and the meanings of other symbols comply with the provisions of GB/T14844.
2 References
GB/T1550—1997 Test method for conductivity type of non-intrinsic + conductor materials GB/T1552—1995 Determination of resistivity of silicon and germanium single crystals by in-line four-probe method GB/T1554—1995 Test method for chemical preferential corrosion of silicon crystal integrity GB/T15551997 Method for determining crystal orientation of semiconductor single crystals GB1557--89 Infrared absorption measurement method for interstitial oxygen content in silicon crystals GB1558—83 Infrared absorption method for determining substitutional carbon content in silicon crystals GB/T4058-1995 Test method for oxidation-induced defects in silicon polished wafers GB/T6618—1995 Test for thickness and total thickness change of silicon wafers Method GB/T6619-1995 Silicon wafer curvature test method GB/T6621-1995 Silicon polished wafer surface flatness test method GB/T6624-1995 Silicon polished wafer surface quality visual inspection method GB11073-89 Silicon wafer radial resistivity change measurement method GB/T13387-92 Electronic material wafer reference surface length measurement method GB/T13388-92 Silicon wafer reference surface X-ray measurement method GB/T14140-93 Silicon wafer diameter measurement method Ministry of Information Industry of the People's Republic of China Issued on November 10, 1999 Implementation on December 1, 1999 20750—1999
GB/T14844—93Semiconductor material grade indication methodGJB179A—96Count sample inspection procedure and requirements of Table 3
3.1Qualification
Products submitted according to this specification shall be qualified products or approved products. 3.2Physical performance parameters
The conductivity type, crystal orientation and crystal orientation deviation, resistivity and radial variation of resistivity of silicon wafers shall comply with the provisions of Table 1. Table 1 Physical performance parameters, impurities and defects of silicon wafersPhysical performance parameters
Conductivity type
and dopants
Crystal orientation and crystal orientation deviation
3.3Oxygen and carbon content
Resistivity
Radial variation of resistivity
The oxygen and carbon content of silicon wafers shall comply with the provisions of Table 1. 3.4 Body integrity
Oxygen content
≤1x1018
The dislocation density and micro defect density of silicon wafers shall comply with the requirements of Table 1. 3.5 Radiation resistance
Carbon content
≤5x1016
The silicon wafers are placed in a neutron reactor and a cobalt 60 source for neutron and irradiation. The irradiation parameters are: a.
Neutron injection: (1±0.1)x101*n/cm*; b.Total dose: 10'GY(Si):
c. Energy: 1Mev equivalent.
Measure the resistivity of the silicon wafers before and after irradiation. The resistivity change rate of the silicon wafers should not be greater than 20%. The resistivity change rate of silicon wafers before and after irradiation is calculated as follows: Resistivity change rate of silicon wafers
Wherein: A is the resistivity of silicon wafers before irradiation, 2.cm; B is the resistivity of silicon wafers after irradiation, 2.cm. 3.6 Geometric dimensions
The geometric dimensions of silicon wafers shall comply with the requirements of Table 2. BA
(A+B)/2
Table 2 Geometric dimensions of silicon wafer
Diameter and total
Allowable deviation
50.8±0.4
76.2±0.4
Thickness and its
Allowable deviation
280±20
381±20
525±20
Main reference plane
Orientation and deviation
<110>: 0°±1°
<110>:0°±19
<110>: 0°±1°
Main reference surface length
and allowable deviation
22.5±2.5
32.5±2.5
×100%
Before reference length
and allowable deviation
11.5±1.5
Total thickness
Bending
Micro defect
Half degree
SJ 207501999
Note: When the user has special requirements for thickness, other dimensions and parameters, it shall be determined by both the supplier and the buyer. 3.7 Surface quality
3.7.1 Surface defects
The surface defect requirements of silicon wafers shall comply with the provisions of Table 3. Table 3 Wafer Surface Quality
Surface Defects
Wafer Front
Wafer Ridge
3.7.2 Wafer Oxidation Faults
Wafer Oxidation Faults shall not exceed 500/cm2. It can also be determined by negotiation between the supplier and the buyer. 4 Quality Assurance Provisions
4.1 Inspection Responsibility
Unless otherwise specified in the contract or order, the contractor shall be responsible for completing all inspections specified in this specification. If necessary, the ordering party or the superior appraisal agency has the right to inspect any inspection item described in the specification. 4.1.1 Qualification Responsibility
All products must meet all requirements of Chapter 3 and Chapter 5 of this specification. The inspections specified in this specification shall become an integral part of the contractor's entire inspection system or quality outline. If the contract includes inspection requirements not specified in this specification, the contractor shall also ensure that the products submitted for acceptance meet the contract requirements. Quality consistency sampling does not allow the submission of products that are known to be defective, nor can it require the ordering party to accept defective products. 4.2 Inspection classification
The inspections specified in this specification are divided into:
a. Identification inspection:
b. Quality consistency inspection.
4.3 Inspection conditions
Unless otherwise specified, all inspections shall be carried out under the following standard atmospheric conditions: Temperature: 15～35°C
Relative humidity: 20%～80%;
c. Atmospheric pressure: 86～106kPa.
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4.4 Identification inspection
SJ 20750—1999
Identification inspection shall be carried out in a laboratory agreed by the relevant competent authorities. The inspection samples shall be products produced by the equipment and processes normally used in production.
4.4.1 Inspection Samples
The samples submitted for identification inspection shall consist of 14 randomly selected pieces of the same nominal size and characteristics from the five single crystals produced in a production process and the single crystals that have passed the inspection. 4.4.2 Inspection
The items of identification inspection, inspection sequence, number of samples to be tested and the number of unqualified products allowed shall be in accordance with Table 4 and Table 5.
Table 4 Identification inspection of silicon single crystal ingot
Inspection items
Conductivity type
Crystal orientation and its deviation
Resistivity
Radial variation of resistivity
Oxygen content
Carbon content
Dislocation density
Micro defect density
Radiation resistance
Required chapter number
Note: Cut a piece from the head and tail of the single crystal ingot for inspection. Inspection or test
Chapter of the method
Table 5 Silicon wafer identification inspection
Inspection items
Any size
Surface defects
Oxidation faults
4.4.3 Qualification criteria
Required chapter number
Inspection or test
Chapter number of the method
Number of samples tested
Number of samples tested
Allowed number of unqualified products
Allowed number of unqualified products
If the tested samples pass all the inspections or tests in Table 4 and Table 5, the identification inspection is qualified. If one or more of the inspections or tests exceeds the allowed number of unqualified products specified in Table 4 and Table 5, the identification qualification will be rejected. 4.4.4 Maintenance of Appraisal Qualification
Appraisal qualification is maintained through quality consistency inspection. The contractor shall submit a copy of the quality consistency inspection record to the superior appraisal agency every three years as needed. 4.5 Quality Consistency Inspection
4.5.1 Composition of Inspection Batch
An inspection batch shall consist of silicon wafers prepared from silicon single crystals of the same conductivity type, orientation, relative resistivity range, diameter and thickness. 4.5.2 Inspection
SJ 20750—1999
4.5.2.1 The inspection of silicon single crystal ingots for silicon wafers shall be carried out according to the inspection items specified in Table 4, and one piece shall be cut from the head and tail of the silicon single ingot for inspection.
4.5.2.2 The inspection of silicon wafers shall be carried out according to the inspection items specified in Table 5. 4.5.2.3 The inspection of silicon wafer geometric dimensions shall be carried out according to the one-time sampling plan of GJB179A inspection level I, and the acceptable quality level (AQL) shall be 1.5.
4.5.2.4 The surface defects of silicon wafers shall be inspected piece by piece. 4.5.2.5 The inspection of silicon wafer oxide layer faults shall be carried out by randomly selecting 4 pieces from a sampling batch. 4.5.2.6 The conductivity type, crystal orientation and crystal orientation deviation, resistivity and resistivity radial variation, oxygen content, carbon content, dislocation, micro defect density and radiation resistance of silicon wafers shall be in accordance with the test results of silicon single crystal ingots used to manufacture silicon wafers. 4.5.3 Unqualified
4.5.3.1 Unless otherwise specified in the contract, if any of the conductivity type, crystal orientation and crystal orientation deviation, resistivity and radial variation of resistivity, oxygen content, carbon content, dislocation, micro defect density and radiation resistance of silicon single crystal ingots used for silicon wafers does not meet the requirements of Articles 3.2 to 3.5, the batch shall be unqualified. 4.5.3.2 If the geometric dimensions of silicon wafers do not meet the requirements of Article 3.6 and the sampling requirements of Article 4.5.2.3, the batch shall be unqualified in the initial inspection. Surface quality defects are subject to full inspection. If a wafer does not meet the requirements of Article 3.7.1, the wafer shall be judged as unqualified; if more than one wafer of silicon wafer oxide layer fault does not meet the requirements of Article 3.7.2, the batch shall be unqualified. 4.5.4 Re-inspection rules
For the inspection batch of silicon wafers that fail the initial inspection of geometric dimensions, re-inspection is allowed after all products of the inspection batch are reworked and it is proved that the original defects have been overcome. The re-inspection adopts a single-item tightened sampling plan. The inspection batch that fails the re-inspection shall be judged as unqualified.
4.5.5 The purchaser may inspect the product within three months from the date of receipt of the product. If the product quality is found to be inconsistent with the requirements of this specification, it may be reported to the supplier and the supply and demand parties shall negotiate to resolve the problem. 4.6 Inspection method
4. 6. 1 The conductivity type of silicon wafers shall be carried out in accordance with GB/T 1550. 4.6.2 The crystal orientation and crystal orientation deviation of silicon wafers shall be carried out in accordance with GB/T1555. 4.6.3 The resistivity of silicon wafers before and after irradiation shall be carried out in accordance with GB/T1552. 4. 6. 4 The radial resistivity change of silicon wafers shall be carried out in accordance with GB 11073 method A. 4. 6. 5 The oxygen content in silicon wafers shall be carried out in accordance with GB 1557. 4. 6. 6 The carbon content in silicon wafers shall be carried out in accordance with GB 1558. 4.6.7 The dislocation density of silicon wafers shall be in accordance with GB/T1554. 4.6.8 The micro defect density of silicon wafers shall be in accordance with GB/T4058. 4.6.9 Geometric dimensions of silicon wafers
4.6.9.1 The diameter and allowable deviation of silicon wafers shall be in accordance with GB/T14140. 4.6.9.2 The thickness and total thickness variation of silicon wafers shall be in accordance with GB/T6618. 4.6.9.3 The curvature of silicon wafers shall be in accordance with GB/T6619. 4.6.9.4 The flatness of silicon wafers shall be in accordance with GB6621. 4.6.9.5 The lengths of the primary and secondary reference planes of silicon wafers shall be in accordance with GB/T13387. -5-
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SJ 20750—1999
4.6.9.6 The orientation of the main reference plane of silicon wafers shall be carried out in accordance with GB/T13388. 4.6,10 The surface defects of silicon wafers shall be carried out in accordance with GB/T 6624. 4.6.11 The oxide layer fault of silicon wafers shall be carried out in accordance with GB/T4058. 4.6.12 The packaging of silicon wafers shall be inspected by daylight and meet the requirements of Chapter 5. 5 Delivery preparation
5.1 Packaging
After the silicon polishing wafers are inspected and qualified, they shall be packaged in plastic boxes in an ultra-clean environment. The plastic boxes shall be clean and anti-static to ensure that the silicon wafers are not polluted.
5.2 Packaging
Put the packaging box containing the wafers into the packaging box and fill the box with soft filler so that the box will not move in the box, then nail the cover and tighten it.
5.3 Storage and Transportation
During transportation, the product should be protected from chemical corrosion, collision and moisture, and should be stored in a dry and non-corrosive environment.
5.4 Marking
5.4.1 The following markings should be on the packaging box:
Name of the manufacturer:
b. Product name and brand;
Contract number or batch number:
Number of boxes;
Date of manufacture;
Signs for shockproof, moisture-proof and fragile.
The product should be accompanied by a certificate of conformity, and should indicate: Product name and type;
Contract number or batch number:
Applicable technical indicators:
Number of pieces:
Seal of the inspector or inspection department and date of inspection: Date of manufacture:
Manufacturer.
6 Notes
6.1 Intended use
The silicon wafers specified in this specification are intended for use as nuclear radiation-resistant silicon single wafers for military CMOS circuits. 6.2 Contents of ordering documents
The following contents should be stated in the contract or order: a. Name and number of this specification:
Special requirements;
Quantity:Www.bzxZ.net
Applicable packaging requirements.
Additional instructions:
SJ 20750-1999
This specification is under the jurisdiction of the China Electronics Technology Standardization Institute. This specification was drafted by the 46th Institute of the Ministry of Electronics Industry. Peak.
The main drafters of this specification: Zhang Yiyan, Duan Shuguang Liu
Project code: B65005.
TTKAONTKAca-1 Composition of inspection lot
An inspection lot shall consist of silicon wafers prepared from silicon single crystals of the same conductivity type, same orientation, relative resistivity range, same diameter and same thickness. 4.5.2 Inspection
SJ 20750—1999
4.5.2.1 The inspection of silicon single crystal ingots for silicon wafers shall be carried out according to the inspection items specified in Table 4, and one piece shall be cut from the head and tail of the silicon single ingot for inspection.
4.5.2.2 The inspection of silicon wafers shall be carried out according to the inspection items specified in Table 5. 4.5.2.3 The inspection of silicon wafer geometric dimensions shall be carried out according to the single sampling plan of GJB179A inspection level I, and the acceptable quality level (AQL) shall be 1.5.
4.5.2.4 The surface defects of silicon wafers shall be inspected piece by piece. 4.5.2.5 The inspection of oxide layer faults of silicon wafers shall be conducted by randomly selecting 4 wafers from a sampling batch. 4.5.2.6 The conductivity type, crystal orientation and crystal orientation deviation, resistivity and radial variation of resistivity, oxygen content, carbon content, dislocation, micro defect density and radiation resistance of silicon wafers shall be in accordance with the test results of silicon single crystal ingots used to manufacture silicon wafers. 4.5.3 Unqualified
4.5.3.1 Unless otherwise specified in the contract, if any of the conductivity type, crystal orientation and crystal orientation deviation, resistivity and radial variation of resistivity, oxygen content, carbon content, dislocation, micro defect density and radiation resistance of silicon single crystal ingots used for silicon wafers does not meet the requirements of 3.2 to 3.5, the batch shall be unqualified. 4.5.3.2 If the geometric dimensions of silicon wafers do not meet the requirements of 3.6 and 4.5.2.3 sampling requirements, the batch shall be unqualified in the initial inspection. Surface quality defects are subject to full inspection. If a wafer does not meet the requirements of Article 3.7.1, the wafer is judged to be unqualified; if the silicon wafer has an oxidation layer fault and more than one wafer does not meet the requirements of Article 3.7.2, the batch is unqualified. 4.5.4 Re-inspection rules
For the inspection batch that fails the initial inspection of the geometric dimensions of silicon wafers, re-inspection is allowed after all the products of the inspection batch are reworked and it is proved that the original defects have been overcome. The re-inspection adopts a single-item tightened sampling plan. The inspection batch that fails the re-inspection is judged to be unqualified.
4.5.5 The purchaser may inspect the product within three months from the date of receipt of the product. If the product quality is found to be inconsistent with the requirements of this specification, it may be proposed to the supplier and the supply and demand parties shall negotiate to resolve it. 4.6 Inspection method
4. 6. 1 The conductivity type of silicon wafers shall be carried out in accordance with GB/T 1550. 4.6.2 The crystal orientation and crystal orientation deviation of silicon wafers shall be carried out in accordance with GB/T1555. 4.6.3 The resistivity of silicon wafers before and after irradiation shall be carried out in accordance with GB/T1552. 4.6.4 The radial resistivity change of silicon wafers shall be carried out in accordance with GB 11073 method A. 4.6.5 The oxygen content in silicon wafers shall be carried out in accordance with GB 1557. 4.6.6 The carbon content in silicon wafers shall be carried out in accordance with GB 1558. 4.6.7 The dislocation density of silicon wafers shall be carried out in accordance with GB/T1554. 4.6.8 The micro defect density of silicon wafers shall be carried out in accordance with GB/T4058. 4.6.9 Geometric dimensions of silicon wafers
4.6.9.1 The diameter and allowable deviation of silicon wafers shall be carried out in accordance with GB/T14140. 4.6.9.2 The thickness and total thickness change of silicon wafers shall be carried out in accordance with GB/T6618. 4.6.9.3 The curvature of silicon wafers shall be carried out in accordance with GB/T6619. 4.6.9.4 The flatness of silicon wafers shall be in accordance with GB6621. 4.6.9.5 The length of the main and secondary reference planes of silicon wafers shall be in accordance with GB/T13387. -5-
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SJ 20750—1999
4.6.9.6 The orientation of the main reference plane of silicon wafers shall be in accordance with GB/T13388. 4.6,10 The surface defects of silicon wafers shall be in accordance with GB/T 6624. 4.6.11 The oxide layer fault of silicon wafers shall be in accordance with GB/T4058. 4.6.12 The packaging of silicon wafers shall be inspected by daylight and meet the requirements of Chapter 5. 5 Delivery Preparation
5.1 Packaging
After the silicon polishing wafers are inspected and qualified, they shall be packaged in plastic boxes in an ultra-clean environment. The plastic boxes shall be clean and anti-static to ensure that the silicon wafers are not contaminated.
5.2 Packing
Put the packaging box containing the wafer into the packaging box, and fill the box with soft stuffing so that the box will not move in the box, then nail the cover and tighten it.
5.3 Storage and Transportation
The product should be protected from chemical corrosion, collision and moisture during transportation, and should be stored in a dry and non-corrosive environment.
5.4 Marking
5.4.1 The packaging box should have the following markings:
Name of the manufacturer:
b. Product name and brand;
Contract number or batch number:
Number of boxes;
Date of manufacture;
Shockproof, moisture-proof and fragile markings.
The product should be accompanied by a certificate of conformity and should indicate: product name, type;
Contract number or batch number:
Applicable technical indicators:
Number of pieces:
Seal of the inspector or inspection department and date of inspection: Manufacturing date:
Contractor.
6 Notes
6.1 Intended use
The silicon wafers specified in this specification are intended for use as nuclear radiation-resistant silicon single crystal wafers for military CMOS circuits. 6.2 Contents of ordering documents
The following contents should be stated in the contract or order: a. Name and number of this specification:
b. Type:
Special requirements;
Quantity:
Applicable packaging requirements.
Additional notes:
SJ 20750-1999
This specification is under the jurisdiction of the China Electronics Standardization Institute. This specification is drafted by the 46th Institute of the Ministry of Electronics Industry.
The main drafters of this specification: Zhang Yiyan, Duan Shuguang and Liu
The project code is: B65005.
TTKAONTKAca-1 Composition of inspection lot
An inspection lot shall consist of silicon wafers prepared from silicon single crystals of the same conductivity type, same orientation, relative resistivity range, same diameter and same thickness. 4.5.2 Inspection
SJ 20750—1999
4.5.2.1 The inspection of silicon single crystal ingots for silicon wafers shall be carried out according to the inspection items specified in Table 4, and one piece shall be cut from the head and tail of the silicon single ingot for inspection.
4.5.2.2 The inspection of silicon wafers shall be carried out according to the inspection items specified in Table 5. 4.5.2.3 The inspection of silicon wafer geometric dimensions shall be carried out according to the single sampling plan of GJB179A inspection level I, and the acceptable quality level (AQL) shall be 1.5.
4.5.2.4 The surface defects of silicon wafers shall be inspected piece by piece. 4.5.2.5 The inspection of oxide layer faults of silicon wafers shall be conducted by randomly selecting 4 wafers from a sampling batch. 4.5.2.6 The conductivity type, crystal orientation and crystal orientation deviation, resistivity and radial variation of resistivity, oxygen content, carbon content, dislocation, micro defect density and radiation resistance of silicon wafers shall be in accordance with the test results of silicon single crystal ingots used to manufacture silicon wafers. 4.5.3 Unqualified
4.5.3.1 Unless otherwise specified in the contract, if any of the conductivity type, crystal orientation and crystal orientation deviation, resistivity and radial variation of resistivity, oxygen content, carbon content, dislocation, micro defect density and radiation resistance of silicon single crystal ingots used for silicon wafers does not meet the requirements of 3.2 to 3.5, the batch shall be unqualified. 4.5.3.2 If the geometric dimensions of silicon wafers do not meet the requirements of 3.6 and 4.5.2.3 sampling requirements, the batch shall be unqualified in the initial inspection. Surface quality defects are subject to full inspection. If a wafer does not meet the requirements of Article 3.7.1, the wafer is judged to be unqualified; if the silicon wafer has an oxidation layer fault and more than one wafer does not meet the requirements of Article 3.7.2, the batch is unqualified. 4.5.4 Re-inspection rules
For the inspection batch that fails the initial inspection of the geometric dimensions of silicon wafers, re-inspection is allowed after all the products of the inspection batch are reworked and it is proved that the original defects have been overcome. The re-inspection adopts a single-item tightened sampling plan. The inspection batch that fails the re-inspection is judged to be unqualified.
4.5.5 The purchaser may inspect the product within three months from the date of receipt of the product. If the product quality is found to be inconsistent with the requirements of this specification, it may be proposed to the supplier and the supply and demand parties shall negotiate to resolve it. 4.6 Inspection method
4. 6. 1 The conductivity type of silicon wafers shall be carried out in accordance with GB/T 1550. 4.6.2 The crystal orientation and crystal orientation deviation of silicon wafers shall be carried out in accordance with GB/T1555. 4.6.3 The resistivity of silicon wafers before and after irradiation shall be carried out in accordance with GB/T1552. 4.6.4 The radial resistivity change of silicon wafers shall be carried out in accordance with GB 11073 method A. 4.6.5 The oxygen content in silicon wafers shall be carried out in accordance with GB 1557. 4.6.6 The carbon content in silicon wafers shall be carried out in accordance with GB 1558. 4.6.7 The dislocation density of silicon wafers shall be carried out in accordance with GB/T1554. 4.6.8 The micro defect density of silicon wafers shall be carried out in accordance with GB/T4058. 4.6.9 Geometric dimensions of silicon wafers
4.6.9.1 The diameter and allowable deviation of silicon wafers shall be carried out in accordance with GB/T14140. 4.6.9.2 The thickness and total thickness change of silicon wafers shall be carried out in accordance with GB/T6618. 4.6.9.3 The curvature of silicon wafers shall be carried out in accordance with GB/T6619. 4.6.9.4 The flatness of silicon wafers shall be in accordance with GB6621. 4.6.9.5 The length of the main and secondary reference planes of silicon wafers shall be in accordance with GB/T13387. -5-
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SJ 20750—1999
4.6.9.6 The orientation of the main reference plane of silicon wafers shall be in accordance with GB/T13388. 4.6,10 The surface defects of silicon wafers shall be in accordance with GB/T 6624. 4.6.11 The oxide layer fault of silicon wafers shall be in accordance with GB/T4058. 4.6.12 The packaging of silicon wafers shall be inspected by daylight and meet the requirements of Chapter 5. 5 Delivery Preparation
5.1 Packaging
After the silicon polishing wafers are inspected and qualified, they shall be packaged in plastic boxes in an ultra-clean environment. The plastic boxes shall be clean and anti-static to ensure that the silicon wafers are not contaminated.
5.2 Packing
Put the packaging box containing the wafer into the packaging box, and fill the box with soft stuffing so that the box will not move in the box, then nail the cover and tighten it.
5.3 Storage and Transportation
The product should be protected from chemical corrosion, collision and moisture during transportation, and should be stored in a dry and non-corrosive environment.
5.4 Marking
5.4.1 The packaging box should have the following markings:
Name of the manufacturer:
b. Product name and brand;
Contract number or batch number:
Number of boxes;
Date of manufacture;
Shockproof, moisture-proof and fragile markings.
The product should be accompanied by a certificate of conformity and should indicate: product name, type;
Contract number or batch number:
Applicable technical indicators:
Number of pieces:
Seal of the inspector or inspection department and date of inspection: Manufacturing date:
Contractor.
6 Notes
6.1 Intended use
The silicon wafers specified in this specification are intended for use as nuclear radiation-resistant silicon single crystal wafers for military CMOS circuits. 6.2 Contents of ordering documents
The following contents should be stated in the contract or order: a. Name and number of this specification:
b. Type:
Special requirements;
Quantity:
Applicable packaging requirements.
Additional notes:
SJ 20750-1999
This specification is under the jurisdiction of the China Electronics Standardization Institute. This specification is drafted by the 46th Institute of the Ministry of Electronics Industry.
The main drafters of this specification: Zhang Yiyan, Duan Shuguang and Liu
The project code is: B65005.
TTKAONTKAca-8 Micro defect density of silicon wafers shall be in accordance with GB/T4058. 4.6.9 Geometric dimensions of silicon wafers
4.6.9.1 The diameter and allowable deviation of silicon wafers shall be in accordance with GB/T14140. 4.6.9.2 The thickness and total thickness variation of silicon wafers shall be in accordance with GB/T6618. 4.6.9.3 The curvature of silicon wafers shall be in accordance with GB/T6619. 4.6.9.4 The flatness of silicon wafers shall be in accordance with GB6621. 4.6.9.5 The lengths of the primary and secondary reference planes of silicon wafers shall be in accordance with GB/T13387. -5-
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SJ 20750—1999
4.6.9.6 The orientation of the primary reference plane of silicon wafers shall be in accordance with GB/T13388. 4.6,10 The surface defects of silicon wafers shall be checked according to GB/T 6624. 4.6.11 The oxide layer faults of silicon wafers shall be checked according to GB/T4058. 4.6.12 The packaging of silicon wafers shall be inspected by daylight and meet the requirements of Chapter 5. 5 Delivery preparation
5.1 Packaging
After the silicon polishing wafers are inspected and qualified, they shall be packaged in plastic boxes in a super clean environment. The plastic boxes shall be clean and anti-static to ensure that the silicon wafers are not polluted.
5.2 Packing
Put the packaging box containing the wafers into the packaging box and fill the box with soft fillings so that the box will not move in the box, then nail the cover and tighten it.
5.3 Storage and transportation
During transportation, the products shall be protected from chemical corrosion, collision and moisture. The products shall be stored in a dry and non-corrosive environment.
5.4 Marking
5.4.1 The following markings shall be on the packaging box:
Name of the manufacturer:
b. Product name and brand;
Contract number or batch number:
Number of boxes;
Date of manufacture;
Signs for shockproof, moisture-proof and fragile.
The product shall be accompanied by a certificate of conformity and shall indicate: Product name and type;
Contract number or batch number:
Applicable technical indicators:
Number of pieces:
Seal of the inspector or inspection department and date of inspection: Date of manufacture:
Manufacturer.
6 Notes
6.1 Intended use
The silicon wafers specified in this specification are intended for use as nuclear radiation-resistant silicon single crystal wafers for military CMOS circuits. 6.2 Contents of order documents
The following contents shall be stated in the contract or order: a. Name and number of this specification:
b. Type:
Special requirements;
Quantity:
Applicable packaging requirements.
Additional instructions:
SJ 20750-1999
This specification is under the jurisdiction of the China Electronics Technology Standardization Institute. This specification is drafted by the 46th Institute of the Ministry of Electronics Industry.
The main drafters of this specification: Zhang Yiyan, Duan Shuguang Liu
Project code: B65005.
TTKAONTKAca-8 Micro defect density of silicon wafers shall be in accordance with GB/T4058. 4.6.9 Geometric dimensions of silicon wafers
4.6.9.1 The diameter and allowable deviation of silicon wafers shall be in accordance with GB/T14140. 4.6.9.2 The thickness and total thickness variation of silicon wafers shall be in accordance with GB/T6618. 4.6.9.3 The curvature of silicon wafers shall be in accordance with GB/T6619. 4.6.9.4 The flatness of silicon wafers shall be in accordance with GB6621. 4.6.9.5 The lengths of the primary and secondary reference planes of silicon wafers shall be in accordance with GB/T13387. -5-
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SJ 20750—1999
4.6.9.6 The orientation of the primary reference plane of silicon wafers shall be in accordance with GB/T13388. 4.6,10 The surface defects of silicon wafers shall be checked according to GB/T 6624. 4.6.11 The oxide layer faults of silicon wafers shall be checked according to GB/T4058. 4.6.12 The packaging of silicon wafers shall be inspected by daylight and meet the requirements of Chapter 5. 5 Delivery preparation
5.1 Packaging
After the silicon polishing wafers are inspected and qualified, they shall be packaged in plastic boxes in a super clean environment. The plastic boxes shall be clean and anti-static to ensure that the silicon wafers are not polluted.
5.2 Packing
Put the packaging box containing the wafers into the packaging box and fill the box with soft fillings so that the box will not move in the box, then nail the cover and tighten it.
5.3 Storage and transportation
During transportation, the products shall be protected from chemical corrosion, collision and moisture. The products shall be stored in a dry and non-corrosive environment.
5.4 Marking
5.4.1 The following markings shall be on the packaging box:
Name of the manufacturer:
b. Product name and brand;
Contract number or batch number:
Number of boxes;
Date of manufacture;
Signs for shockproof, moisture-proof and fragile.
The product shall be accompanied by a certificate of conformity and shall indicate: Product name and type;
Contract number or batch number:
Applicable technical indicators:
Number of pieces:
Seal of the inspector or inspection department and date of inspection: Date of manufacture:
Manufacturer.
6 Notes
6.1 Intended use
The silicon wafers specified in this specification are intended for use as nuclear radiation-resistant silicon single crystal wafers for military CMOS circuits. 6.2 Contents of order documents
The following contents shall be stated in the contract or order: a. Name and number of this specification:
b. Type:
Special requirements;
Quantity:
Applicable packaging requirements.
Additional instructions:
SJ 20750-1999
This specification is under the jurisdiction of the China Electronics Technology Standardization Institute. This specification is drafted by the 46th Institute of the Ministry of Electronics Industry.
The main drafters of this specification: Zhang Yiyan, Duan Shuguang Liu
Project code: B65005.
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